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Agentic AI in the Embedded Toolchain: An Evaluation Playbook for MCU, FPGA and Firmware Teams

Board bring-up is where embedded productivity claims meet reality. A pin mapped to the wrong bank, a clock tree still at its reset default, a peripheral init sequence missing one register write: each of these can swallow a day of probes, log captures and re-flashes. That failure mode is precisely what the new wave of AI agents is being pointed at. This generation of assistants is not being sold as generic autocomplete; it is being wired into hardware description tools, formal proof engines, debuggers and IDEs with the target device's context attached.

For an embedded audience the interesting questions are therefore narrow and practical: what context is the agent actually handed, what check stands between its output and your repository, and who owns traceability when the code lands in a safety project. Their uses already span generating code, configuring platforms and even shaping FPGA hardware, though concerns persist about generated-code quality and safety. The recent work from AMD, AdaCore, Infineon Technologies, Tasking and the Qt group answers those questions differently, and reading them side by side is more useful than reading any single announcement on its own.

The real bottleneck is handoffs, not syntax

Kirk Saban, vice president for Product, Software and Solutions at AMD, framed the change as “Natural language as the new abstraction layer for embedded in both the hardware and software domains,” and added that “The fundamental game changer has been the advent of large language models (LLMs) with the ability to describe the problem in natural language.”

Speaking to eeNews Europe, Saban said, “One of the key things we see in embedded is that we deal with all different types of domains, form factors, use cases, and that requires a lot of different disciplines and architectural trade-offs,” and noted, “There’s often many manual handoffs and there are lots of different tools out there and as the chips have become more complicated so have the tools.”

That diagnosis is the most concrete statement in the current cycle, because it locates the loss in the seams of the flow rather than in the editor window. Every extra domain, form factor and use case multiplies tool switches and the copy-paste between them; an agent that only writes functions does nothing about that.

AMD's answer is Ross, an interface harness that lets its toolchain communicate across multiple tools. The name follows Anthropic’s Claude AI convention and honors Ross Freeman, inventor of the Field-Programmable Gate Array (FPGA) and former director of engineering at Zilog and a co-founder of Xilinx, alongside Bernie Vonderschmidt and James Burnett. Saban said, “AMD Ross spans the entire paradigm of our development stack, running alongside and plugging into all the different tools,” and that reach covers AMD tools from Vivado FPGA design tools and Vitis unified IDE development environment to Ryzen embedded processor AI tools and ChipScope integrated logic analyzer.

Model lock-in is the first thing a platform team checks, and here the architecture is deliberately thin: “We are not in the business of creating LLMs – Ross will plug into any of the public model providers, but we also support open weight models. It’s a harness across our entire development stack. We are giving a harness for you to adapt to your design environment,” Saban said. “It is the same with IDE tools, we work with all the major players in the industry.”

Guardrails by proof: AdaCore, SPARK and GNAT Foundry

AdaCore is applying the same logic to embedded code for safety-critical systems, using Ada, SPARK and GNAT Pro, and its answer to generated-code quality is proof rather than review. Mark Hermeling, head of technical marketing at AdaCore, put the cost problem plainly: “We know that Spark requires an additional level of effort. You can write it without the additional formal methods, but it is harder,” before adding, “But if you have Ada code and you want to lift that to SPARK Silver [to guarantee the absence of runtime errors], AI can do that in an LLM, every time. This is a tremendous offload for the developer.”

The workflow Hermeling describes is one firmware engineers will recognise. He took a standard STMicroelectronics C data-gathering demo, converted it to Ada and lifted it to SPARK Silver on a laptop during a flight from Los Angeles to Toronto. That work produced six areas for inspecting incoming data, and the same mechanism can set selected functional properties, typically for safety or security, at the next level; SPARK Gold and SPARK Platinum cover the full formally proven design for safety critical code such as automotive, aerospace or encryption. “So whatever AI does it can never violate those requirements, so it’s really easy for developers to elaborate the code while staying completely safe,” he said.

Delivery is through a skills repository hosted on Github. “This includes what we have learned over the last six to nine months,” Hermeling said — a consolidation period rather than a product launch. “We started with Model Context Protocol (MCP) but this is not necessary for command line tools, the skills do that. Specifically, the Connect skill codifies SPARK best practices. Grab the skills from the repo and use the Prove skills. This spawns a set of agents in a particular pattern to lift the Ada code to SPARK Silver,” he said.

For teams wondering how such a flow survives an audit, the structure is the point: “What GNAT Foundry provides is a workflow for agents to follow the V-model for requirements. There’s an agentic framework with discrete steps and for each step there is an oracle that checks whether the AI is doing the right thing,” he said. The repository has been cloned by 250 people so far and contains an example high integrity traffic light system that can be extended with AI, moving from high level requirements to low level code while maintaining Gold-level properties.

Hermeling's warning is the one worth pinning above the review board: “The frontier models are brilliant, but LLMs are intelligent parrots that are trained on poor C code as perfect C code doesn’t exist. One of the challenges with AI is its ability to generate vast amounts of code that you can’t possibly verify,” he said. “With GNAT Foundry you don’t have to. As long as an engineer has reviewed the Gold level properties then it doesn’t even matter if every single line of code has been tested.”

The automotive example shows why patch-based reassurance is thin. He cited automotive ISO 26262 ASIL-D safety critical code where a frontier model found a handful of memory violations and also provided exploits. “Customers can fix those violations but next week’s model will find more. We have to find a different way of doing software engineering,” he said. “Writing code becomes less important, software engineering becomes more important – you come up with the design and how to componentise, that’s what the Gnat example shows,” he said. “There’s a ton of pressure to write and ship so I would always wrap code with as many oracles as I can – that’s what people have to keep in mind – LLMs like humans can make mistakes.”

Bring-up-safe code generation: Infineon's device context layer

Infineon Technologies is targeting the other end of the loop: context. The company is broadening its ModusToolbox tools with an AI assistant extension for microcontrollers, because embedded work depends on exact hardware setup — an incorrect pin assignment or omitted clock configuration can force teams to spend hours debugging physical boards, and generic AI assistants often do not have the device-specific context needed to catch such problems early.

The ModusToolbox AI Assistant for Microsoft Visual Studio Code (VS Code) gives AI coding agents hardware-specific context for PSOC Edge and PSOC Control controllers. Lacking that context, generic AI coding assistants can produce code that looks plausible but fails on real hardware: output that targets the wrong device, calls deprecated APIs, or skips an initialization step that only becomes visible during board bring-up. Every suggestion is tied by the ModusToolbox AI Assistant to the developer's actual target device, board and peripheral configuration. Project context is evaluated locally, and customer project data remains on the developer's system. Typical uses include connected IoT devices that combine graphics and connectivity functions.

The mechanics are worth copying if you build your own agent plumbing. Context is obtained through local workspace analysis covering the project structure, board support package, installed middleware, code examples and available tools; the extension then uses that review to give the AI agent device-specific instructions and development skills. Coverage includes peripherals such as GPIO, I2C, SPI, UART and DMA, along with connectivity and RTOS functions. With that targeted context the agent can generate more accurate code while consuming fewer tokens — a real constraint on any team running a token budget or a slow model behind a gateway.

Prior to code generation, the assistant creates a project plan for developers to review and refine. That plan specifies the target device, board, libraries and project structure. The workflow also supports migrating existing projects to other Infineon devices; future releases of the extension will add support for PSOC 4, PSOC 6 and TRAVEO T2G families.

Debug evidence with traceability: Tasking's winIDEA AI Kit

Embedded teams — especially those building complex, multicore applications — must deliver increasingly complex, functionally safe software within tighter timelines. Although AI can help write, test and verify software, requirements traceability still puts full responsibility for all AI activity on developers. Tasking has introduced certifiable agentic AI for embedded debugging analysis on exactly that premise: developers may choose their own LLM and agentic AI to automate software development, but the setup supports requirements traceability and simplifies certification to functional safety standards.

AI agents can connect to Tasking's unified toolchain through the winIDEA development environment using the tools and files. When agents are reachable inside the development toolchain, developers can automate several workflows, which speeds software design and verification while preserving strict requirements traceability for certification. Within Tasking's winIDEA software workflows, the tools integrate AI and give generically trained LLMs context on how code or scripts should be generated. Guardrails limit what AI may do, and human oversight keeps accountability intact as AI supports the development lifecycle without compromising reliability, functional safety or security.

“Our approach to AI accelerates complex, multicore embedded development by giving agents structured access to debug and analyse workflows,” said Janez Ulcakar, Director of R&D Debugger Solutions at Tasking. “This enables agentic-based automation to work with real-time debug evidence while ensuring engineers remain in full control of AI processes and conclusions. This is essential for systems that need to be certified to functional safety standards.”

Concretely, the winIDEA AI Kit brings together three maintained components. The first is an MCP server that provides structured access to design tool capabilities, including debug control, memory, variables, breakpoints, trace, coverage, profiling and timing analysis. The second is AI-ready winIDEA SDK documentation that helps agents create accurate automation scripts in supported programming languages. The third is embedded-development skills providing task-oriented guidance and context for debugging, timing analysis, winIDEA configuration and device-specific workflows. As a result, teams can ask an AI agent to perform tasks rather than build and maintain a large library of custom scripts or tool instructions.

Side by side: what each agent is actually given

Toolchain and layerContext handed to the agentEmbedded failure it targetsControl the engineer keeps
AMD Ross — across the development stack (Vivado, Vitis, Ryzen embedded AI tools, ChipScope)Harness over multiple tools; public model providers or open weight models; MCP servers to AMD documentation; published skillsManual handoffs between many tools as chips and tooling grow more complicatedRuns inside the firewall; customer sets the level of access to models and data; works alongside the engineers
AdaCore GNAT Foundry — Ada, SPARK, GNAT ProSkills on Github (Connect, Prove) plus a V-model workflow with an oracle at each discrete stepVast generated code that cannot be verified; runtime errors in safety critical codeEngineer reviews the Gold level properties instead of every single line
Infineon ModusToolbox AI Assistant — VS Code extensionLocal workspace analysis of project structure, board support package, middleware, examples and tools; GPIO, I2C, SPI, UART, DMA, connectivity, RTOSWrong device target, deprecated APIs, skipped initialization, bad pin or clock setup discovered at board bring-upProject plan reviewed and refined before generation; project data stays on the developer's system
Tasking winIDEA AI Kit — debug and analysisMCP server exposing debug control, memory, variables, breakpoints, trace, coverage, profiling and timing analysis; AI-ready SDK docs; skillsAutomation of multicore software development without requirements traceability for certificationGuardrails limit what AI may do; human oversight keeps accountability intact
Qt group / IAR Clate — embedded UINatural language prompting for screen generation and design changes; MCP connections to other design and productivity toolsWeb-centric tools that do not account for real-world hardware constraintsProduction-ready QML output; designers retain control and ownership of the user experience

Skills, airgaps and the shape of the future embedded stack

“You can use LLMs such as Claude today to run tools such as Vivado and we will be working on all the point tools to make them more agentic friendly with output files that are more friendly to agentic tools,” Saban said. “We use MCP which is Anthropic’s database interface to LLMs. Through MCP servers we will give access to our entire knowledge base with access to all the documentation.”

“The other piece is making skills available, such as design rules for board layout, best practices for timing closure in an FPGA, published through the agent skills repository. We also see that customers will want to use the knowledge in their own way and they can plug that into their own workflows.”

Trust boundaries are the first question most embedded managers ask, and the answer here is architectural rather than promotional: “We understand the importance of the airgap for safety and security. Ross can run inside the firewall so you are not putting anything into the public domain. The customer gets to decide the level of access to models and data. We use Claude in AMD sandboxed and firewalled with an LLM gateway.”

Saban described Ross as building a skills ecosystem around AMD devices. “We can provide specific skills, for example pipelining, timing closure, partitioning but customers can deploy their own skills internally or to publish, and partners can develop skills. We have design and tool agents, a specification agent and a code creation agent. We will publish 20 skills with the initial release but this will expand rapidly,” he said. “We know the embedded development community very well, they need to be in control, we are very conscious of that and Ross is working alongside the engineers.”

The repository will expose all the skills, although industry-level challenges still need to be solved, and the format is deliberately provisional: the skills are initially plain text markdown files. “We are actively evaluating this. Initially it will be in a repo as a plug in with the skills and MCP server and through the MCP server you get access to the AMD database so it gets you to an answer more efficiently with less tokens,” said Saban.

The one figure AMD puts on the table is resource utilisation, which is the metric FPGA engineers actually argue about. Saban cited a 300-megapixel sensor development with an FPGA for image processing. In that case, handwritten C++ code for the HLS algorithm takes two days and uses 1801 lookup tables (LUTs) in the FPGA, while Ross completes the work in two hours and uses 1177 LUTs. Designers have had early access since June, with over 800 customers using it for FPGA development in Vivado, and monthly updates are planned.

No-code UI, memory-safe languages and digital twins

The shift toward AI agents is also changing how code is developed at all, moving work away from languages such as C++ toward memory-safe Rust with AI support, digital twins with AI models of components, and no-code development environments.

The Qt group, whose portfolio includes the IAR development tools, has built an AI-native, no-code tool for embedded interfaces. Clate is currently in beta testing and seeks to reduce reliance on generic web and mobile design tools. Its AI-native integration supports natural language prompting for actions such as screen generation and design changes, and it uses MCP to connect directly with other design and productivity tools. It outputs production-ready QML code, a declarative programming language designed for building user interfaces.

“For too long, embedded UI/UX designers have had to compromise their work, using web-centric tools that simply don’t account for real-world hardware constraints,” said Antti Kujala, Vice President, Design Products at Qt Group. “We created Clate to end that compromise, and to give designers back full control and ownership of the user experience. Designers won’t need in-depth knowledge of code either. Clate runs on Qt, and generates QML production-ready code automatically in the background. And, as an AI-native workspace, Clate connects across a designer’s ecosystem through standard MCP protocols, allowing teams to prompt changes using natural language, without disrupting their natural flow. For the first time, designers can be confident that the UI and UX they create will be exactly what the end-user experiences.”

A suite of planned features is set to arrive in early 2027 with AI assistants, integrations and production-ready QML code output. Embedded hardware optimization features, including frame rate and memory consumption checking, will follow shortly after the initial release — the point at which such tools stop being UI conveniences and start respecting the target.

On digital twins, Saban was measured: “To do that there are several things that need to happen. Some of the IP models need a software-centric model and some of that IP is ours, some is from third parties, we don’t have a firm plan today but I can see the industry moving to that over time and the whole ecosystem needs to evolve,” he said.

On language choice, Hermeling is blunter: “If people starring new projects in C++ right now I really question whether that’s the right thing to do, why would you not start in Rust,” he asks. “There’s enough libraries for that and AdaCore is working to get there with Rust. We support Rust to the same level as Ada as we understand that people want to use it unless you have requirements for high levels of high integrity and then Ada does that.”

A pilot playbook for your next firmware task

  1. Start with context, not prompts. Have the agent read the local workspace — project structure, board support package, installed middleware, code examples and available tools — the same inventory the ModusToolbox AI Assistant analyses before generating anything.
  2. Make the agent produce a plan first: target device, board, libraries and project structure. Review and refine it, and settle the pin map, clock configuration and init sequence at this stage rather than inside generated C.
  3. Declare the properties before the code. Set the contract the agent must not violate — in AdaCore terms the SPARK Silver absence of runtime errors, then the selected functional properties for safety or security, with SPARK Gold and SPARK Platinum reserved for the fully formally proven safety critical cases.
  4. Put an oracle on every step. Adopt the discrete-step, V-model style workflow GNAT Foundry uses, checking after each step whether the AI is doing the right thing, and wrap the code with as many oracles as your pipeline can run.
  5. Give the agent structured access to real evidence, not only source files. The winIDEA AI Kit exposes debug control, memory, variables, breakpoints, trace, coverage, profiling and timing analysis over an MCP server, which is what turns a plausible patch into a verifiable one.
  6. Fix the trust boundary before you connect: model provider or open weight model, sandbox, firewall scope, LLM gateway, and where project context is evaluated. Local evaluation and data staying on the developer's machine are the two properties to demand if your policy requires them.
  7. Benchmark on the metrics your team argues about. AMD's comparison for a 300-megapixel sensor pipeline — two days and 1801 lookup tables handwritten versus two hours and 1177 LUTs with Ross — shows why turnaround and resource utilisation should be measured as a pair, not lines of code produced.
  8. Keep sign-off human. Requirements traceability still puts full responsibility for all AI activity on developers, so the engineer who reviews the properties remains the accountable role in the flow.

Common misconceptions

  • “The agent replaces the engineer.” AMD describes Ross as working alongside the engineers, Tasking keeps guardrails and human oversight over AI processes and conclusions, and AdaCore still needs an engineer to review the Gold level properties.
  • “If it compiles, it ships.” Generic assistants produce code that looks plausible but fails on real hardware — wrong device, deprecated APIs, or a missing initialization step that surfaces only at board bring-up.
  • “MCP is mandatory everywhere.” AdaCore's own path started with Model Context Protocol (MCP), but Hermeling notes it is not necessary for command line tools because the skills do that.
  • “More generated code is better.” The risk is volume you cannot verify; the mitigation is proof of properties rather than exhaustive line-by-line testing.
  • “The tool vendor carries the safety burden.” Traceability places full responsibility for all AI activity on developers; guardrails reduce risk but do not transfer accountability.
  • “No-code UI ignores hardware.” Frame rate and memory consumption checking are exactly the embedded hardware optimization features slated to follow Clate's initial release.

FAQ

Does Ross force a specific model provider on us?

No. Saban states that AMD is not in the business of creating LLMs: Ross plugs into any of the public model providers and also supports open weight models, acting as a harness across the development stack, and the same openness applies to IDE tools, where AMD works with all the major players in the industry.

Can we run an agent on an air-gapped or restricted network?

That is the documented intent. Ross can run inside the firewall, the customer decides the level of access to models and data, and AMD's own use of Claude is sandboxed and firewalled with an LLM gateway. On the Infineon side, project context is evaluated locally and customer project data remains on the developer's system.

Which SPARK level does our project actually need?

SPARK Silver guarantees the absence of runtime errors; selected functional properties, typically for safety or security, sit at the next level, while SPARK Gold and SPARK Platinum cover the full formally proven design for safety critical code such as automotive, aerospace or encryption.

What exactly is in the winIDEA AI Kit?

Three maintained components: an MCP server providing structured access to design tool capabilities including debug control, memory, variables, breakpoints, trace, coverage, profiling and timing analysis; AI-ready winIDEA SDK documentation for accurate automation scripts; and embedded-development skills for debugging, timing analysis, winIDEA configuration and device-specific workflows.

Should we still start new projects in C++?

Hermeling questions that choice and points to Rust, noting there are enough libraries for it and that AdaCore supports Rust to the same level as Ada — unless you have requirements for high levels of high integrity, in which case Ada does that.

Is Clate usable today for production embedded UI?

It is in beta testing and already outputs production-ready QML code. The planned suite of AI assistants, integrations and QML output arrives in early 2027, with frame rate and memory consumption checking following shortly after the initial release.

Action recommendations

  • Pick one bring-up-prone task this quarter — a peripheral init sequence, a device migration, an HLS kernel — run it through an agent with device context attached, then compare the result against your handwritten baseline on turnaround and resource utilisation.
  • Write your own skills as plain text and keep them in version control. Both AdaCore on Github and AMD's agent skills repository publish practice this way, and the format is still evolving, so markdown today costs little to migrate later.
  • Before any agent touches a certified repository, define the oracle set and the review point. If you cannot state the properties the code must not violate, that project is not ready for generated code.
  • Instrument the trust boundary now: model provider, gateway, firewall scope and which project data leaves the developer machine. Infineon's local evaluation and AMD's sandboxed gateway are the two patterns worth copying.
  • Treat requirements traceability as an engineering deliverable rather than a certification afterthought; it is what lets automation speed design and verification without breaking certification evidence.

What these announcements really redistribute is leverage, not headcount. The scarce skills are the ability to specify constraints precisely, to define properties a proof engine or an oracle can check, and to keep debug evidence machine-readable for the tools on either side of the agent. Anything you automate without those three simply produces more code to argue about. Start with the smallest bring-up-critical task, put a check on every step, keep the evidence traceable, and let the trace do the arguing.

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