Semiconductor Memory Under Squeeze: Everspin MRAM, NOR Flash Shortages, AI Servers and Space Platforms

For Electronicseng’s Semiconductors audience, the practical issue is how MRAM can be used when NOR flash availability moves from a procurement nuisance to a system-architecture decision. Everspin Technologies is making that case to AI server, data center, aerospace and edge teams, arguing that persistent, fast non-volatile memory can reduce reliance on constrained flash supply.

As Everspin Technologies president and CEO Sanjeev Aggarwal told EE Times, the pitch starts with a performance objection: “If you care for performance, I think that MRAM is the only solution we have,” he told EE Times.

Aggarwal said customers are considering MRAM not only for speed, endurance and reliability, but also because some NOR flash products are hard to obtain. TrendForce estimated that NOR flash contract prices rose by a cumulative 100% to 120% in the first half of 2026. According to TrendForce, AI-related demand absorbed much of the limited supply, NOR flash was among the first products to face longer lead times and allocation, and suppliers had not announced major capacity expansion.

Aggarwal described the shortage opportunity as potentially worth $3 billion in 2028 or 2029, and said Everspin has been developing a product for that market using TSMC's manufacturing process.

He summarized the market change in blunt terms: “Now people cannot buy NOR flash,” he said. “Most of the fabs in Asia have converted from NOR flash to DRAM. Much better profit margins. Then what is the alternative? MRAM is the only alternative for standalone or discrete products. And that is where they approach us.”

Before the price surge, MRAM could cost about three times as much as NOR flash, according to Aggarwal. The gap has narrowed to about 1.5 times, he said. “If you are going to use two NOR flash chips, you might as well just use one MRAM and be more cost-effective,” he said.

The visual from TrendForce, dated June 2026, presents SLC NAND and NOR Flash supply-demand conditions and pricing outlook for the second half of 2026.

Where MRAM fits between NOR flash, FRAM and NVSRAM

The replacement logic depends on system economics. Aggarwal said the decision turns on how many chips are required, plus performance and reliability specifications. He also said Everspin's distributors had started asking for cross-reference information to help customers find MRAM alternatives when particular NOR flash components were unavailable.

He added that other non-volatile options may not satisfy every application. In the products Aggarwal described, Ferroelectric RAM (FRAM) has lower available densities, while non-volatile static random-access memory (NVSRAM) can present tradeoffs in reliability and operating conditions. Everspin specifies an operating temperature range of minus 40°C to 125°C for the parts Aggarwal discussed, and cites reliability, SRAM- and DRAM-like performance, and read-write endurance as selection drivers. Everspin lists 64-Mb, 128-Mb, and 256-Mb capacities in its PERSYST family, which uses a quad serial peripheral interface (QSPI).

Comparison table for semiconductor memory selection

Option	Relevant advantage	Constraint or risk
NOR Flash	Baseline non-volatile memory referenced by the shortage; contract prices rose 100% to 120% in the first half of 2026	Longer lead times, allocation, and no announced major capacity expansion, according to TrendForce
MRAM (PERSYST)	20 to 30 nanoseconds access; minus 40°C to 125°C; 64-Mb, 128-Mb, 256-Mb; one MRAM may replace two NOR flash chips	Density currently one gigabit; stacking may be needed for 8 Gb or 16 Gb; cost gap about 1.5 times
FRAM	Alternative non-volatile memory path	Lower available densities, as described by Aggarwal
NVSRAM	Can address some non-volatile roles	Tradeoffs in reliability and operating conditions

Financial context and demand mix

According to the company's annual report filed with the U.S. Securities and Exchange Commission (SEC), Everspin reported revenue of $55.2 million for 2025, up 9.5% from $50.4 million in 2024. Aggarwal said he expects the company to double revenue over three to four years. The growth plan, as he described it, relies on the NOR flash gap plus demand from data centers, aerospace and defense, low-Earth-orbit (LEO) satellites, and industrial automation.

CXL demonstration tests an AI memory tier

Everspin demonstrated MRAM modules combined with a Compute Express Link (CXL) controller at the Storage Networking Industry Association (SNIA) Developer Conference in Santa Clara, California. The setup created a pool of persistent memory accessible through CXL.mem, a protocol that lets a system access memory over a CXL connection.

Aggarwal described the role as an additional memory tier between DRAM working memory and NAND flash storage. He noted that DRAM works on a nanosecond timescale, while NAND flash access can take hundreds of microseconds. Moving data between compute and slower storage can delay workloads.

“Our memory is 20 to 30 nanoseconds,” he said. “You can use it for storage as well as compute, reducing the gap between NAND storage and DRAM working memory.” He said the proposed role is to hold data generated during AI processing before transfer to longer-term storage, including key-value (KV) caches, checkpoints, and data awaiting a write. The KV cache retains information reused by a model while generating a response; checkpoints let a job resume after failure.

Densities currently reach one gigabit, but devices could potentially be stacked to provide 8 Gb or 16 Gb; capacity remains a limitation. Aggarwal argued the technology would not need to match NAND flash capacity if it held intermediate data only temporarily. The company is developing a roadmap for higher-density memory and newer interfaces.

He said Everspin has supplied IBM's FlashCore Modules and wants to expand data center business beyond DDR4. “Our demonstration of the CXL protocol with our existing DDR4 chip will start getting us some entry into the data center market,” he said. “And by the time we have a good foothold, we will have a 4-Gb DDR6 part ready to go right behind it.” Aggarwal estimated that this development would take about three years.

At the edge, Aggarwal said MRAM could reduce the need to move data between devices and central servers. He cited OpenMV as an example where Everspin has replaced SRAM and added MRAM for configuration.

Satellite systems and geosynchronous adoption

Earlier this year, for a geosynchronous Earth orbit (GEO) mission, Astro Digital selected Everspin's 64Mb PERSYST spin-transfer torque MRAM (STT-MRAM), part number EM064LXQADG13IS1T, as the primary fail-safe memory for the boot process on its Raven satellite bus. Aggarwal said the boot memory stores code needed to start spacecraft electronics and support system recovery.

“What Astro Digital did recently was, they took our part and sent it into geosynchronous orbit,” Aggarwal said. “So, not low Earth, but they sent those to geosynchronous orbit.”

He noted MRAM's radiation tolerance helps in space, while the surrounding silicon can still be vulnerable. In the configuration he described, backup memory provides an additional safeguard if surrounding circuitry is affected. Aggarwal also cited MRAM's write speed and reliability over NOR flash, saying the memory can be written almost three orders of magnitude faster than NOR flash and consumes less power in the applications he described. The company's PERSYST family lists 64-Mb, 128-Mb, 256-Mb capacities with QSPI.

Aggarwal gave a general example of MRAM reducing chip count, but the comparison should not be read as a description of Astro Digital's actual satellite configuration.

MaxLinear AI server evaluation

The company signed an MoU with MaxLinear to evaluate MRAM alongside MaxLinear's storage compression, encryption, and hardware acceleration platform for AI servers. The agreement will focus on metadata management, log data, write buffering, cache, and other data-intensive workloads. It also plans technical validation and market development aimed at hyperscale cloud providers, AI infrastructure developers, and enterprise server customers, and includes potential longer-term manufacturing, supply, and commercialization opportunities.

Aggarwal said MaxLinear was the first target because of accelerator technology. “They have accelerators, so they were very interested in the technology,” he said. “We are working with them to find the first use case.” The MoU establishes an evaluation framework; it does not announce a finished product or a volume commitment.

Manufacturing expansion and supply

Everspin produces two main families: field-switched, or toggle, MRAM, and STT-MRAM. It manufactures toggle MRAM at its 8-inch facility in Chandler, Arizona. Its portfolio ranges from 128 kilobits to 1 Gb across several densities and interfaces. Aggarwal said the company had shipped more than 200 million units over 20 years, with only a handful of returns.

Earlier this year, the company signed an initial 10-year foundry services agreement with Microchip Technology to establish an 8-inch MRAM and tunnelling magnetoresistance (TMR) sensor manufacturing line at Microchip's Fab 4 facility in Gresham, Oregon. The agreement is intended to provide a second U.S. manufacturing source for toggle MRAM. The U.S. SEC filing stated that the first products are expected to ship in the second half of 2027.

“We signed a foundry services agreement with Microchip, which allows me to manufacture twice the amount of toggle MRAM that I could manufacture in Chandler,” Aggarwal said. The agreement is also connected to a $40 million U.S. government contract awarded through Amentum Services, with Everspin acting as a subcontractor. Aggarwal said the work will qualify Everspin's process at Microchip and provide the government with access to the company's intellectual property and a second manufacturing line for future government products.

For STT-MRAM, Everspin has worked with GlobalFoundries on 12-inch wafers since 2016. It also plans to tape out a product using TSMC's 16-nm process, which Aggarwal said would diversify supply. The company's aim is two manufacturing sources for both product families: Chandler and Oregon for toggle MRAM, and GlobalFoundries and TSMC for STT-MRAM. Aggarwal said capacity was not currently a constraint.

Everspin also faces commercial MRAM competition. Aggarwal said South Korean company Netsol, which uses Samsung Foundry, offers a 16-Mb product. He expects a 1-Gb product from the competitor to reach the market in 2028 or 2029.

India openings

India is another potential market, particularly aerospace and defense, electric vehicles, and railways. Aggarwal said he was seeking connections with Defence Research and Development Organisation (DRDO), Indian Space Research Organisation (ISRO), and Indian satellite companies. He identified battery management systems and vehicle data recorders as possible applications, alongside flight control systems. Everspin is working to expand its Indian distribution network, and Aggarwal said the company is exploring local partnerships, including discussions involving Indian distributors and possible outsourced semiconductor assembly and test (OSAT) arrangements.

Aggarwal also said the company is speaking with Indian automotive groups and exploring rail opportunities. He cited existing deployments in rail systems in Europe, Japan and China, where memory stores operational data. “We are always in discussions about these potential opportunities,” he said of Indian railway opportunities. “There is nothing that I can talk about openly, but obviously the conversations are ongoing.”

Selection checklist for semiconductor memory substitution

1. Confirm whether the design uses standalone/discrete NOR flash, boot/fail-safe code storage, KV cache/checkpoint buffering, or an edge device that would otherwise shuttle data to central servers.
2. Map the latency budget: compare DRAM working memory, NAND flash access of hundreds of microseconds, and MRAM's 20 to 30 nanoseconds.
3. Check environmental and endurance requirements, including Everspin's specified minus 40°C to 125°C operating range and read-write endurance cited by Aggarwal.
4. Compare chip count and system cost, not price per device alone; the two-NOR-chip example may change the bill of materials.
5. Validate interface and capacity: PERSYST 64-Mb, 128-Mb, 256-Mb QSPI parts, one gigabit current density, and potential 8 Gb or 16 Gb stacking.
6. Treat partnership announcements as status levels: MaxLinear MoU is an evaluation framework, not a volume product.
7. Track supply alternatives: Chandler and Oregon for toggle MRAM, GlobalFoundries and TSMC for STT-MRAM, and Netsol competition.

Common misconceptions

• MRAM is not automatically cheaper on a per-chip basis. Aggarwal's cost case is system cost: one MRAM instead of two NOR flash chips, with the price ratio about 1.5 times after the rise.
• A CXL demonstration is not a shipping CXL memory product. It shows a possible tier, while current density is one gigabit and higher stacks may need work.
• Radiation tolerance noted for MRAM does not mean the entire satellite subsystem is immune. Aggarwal noted surrounding silicon can still be vulnerable, which is why backup can help.
• Space adoption and AI-server MoUs describe different maturity levels. Astro Digital used a 64Mb PERSYST part; MaxLinear is evaluating workloads.

FAQ

Why is MRAM relevant now?

NOR flash supply tightened and prices rose by a cumulative 100% to 120% in the first half of 2026, according to TrendForce. That pushed customers to ask for cross-references and made MRAM more comparable to flash, with the gap about 1.5 times.

What does the CXL demonstration prove?

It shows MRAM modules with a CXL controller at SNIA, using CXL.mem to access persistent memory. Aggarwal positioned MRAM as 20 to 30 nanoseconds memory that could sit between DRAM and NAND, but the technology still faces capacity limits at one gigabit per device.

Where is the clearest adoption case?

Satellite boot memory. Earlier this year, Astro Digital selected the 64Mb PERSYST EM064LXQADG13IS1T part for fail-safe boot memory on the Raven bus in geosynchronous Earth orbit.

Is the opportunity only in space?

No. Aggarwal sees data centers, aerospace and defense, low-Earth-orbit (LEO) satellites, industrial automation, edge devices such as OpenMV, and AI server workload evaluation with MaxLinear as part of the demand mix.

Action advice

Hardware teams facing allocation should request distributor cross-reference data for unavailable NOR flash components and model whether one MRAM device can replace multiple flash parts. Supply-chain teams should verify the status of dual-source plans: Chandler and Oregon for toggle MRAM, GlobalFoundries and TSMC for STT-MRAM. Analysts should separate demonstrated uses, such as Astro Digital's 64Mb PERSYST boot memory, from evaluation-stage work, such as the MaxLinear AI server MoU and the CXL tier demo. The next checkpoints are Everspin's TSMC 16-nm tapeout, the 4-Gb DDR6 roadmap described as taking about three years, and Microchip-sourced toggle MRAM products expected in the second half of 2027.

Everspin's bet is that performance and availability can move MRAM beyond industrial niches. The company reported $55.2 million in 2025, up 9.5%, and Aggarwal expects double revenue over three to four years if the NOR flash gap, CXL/AI memory tier experiments, satellite wins, and data center interest hold together. The practical takeaway is to evaluate MRAM as a constrained supplement, not a universal replacement, until density, interface maturity, and dual-source production scale are proven.