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Electronicseng Semiconductor Deep Dive: Infineon OktoberTech, Edge AI, SDVs, and 800 VDC

For the Electronicseng Semiconductors desk, the important signal from the 10th annual OktoberTech is not the conference setting but the engineering inference: physical AI converts software demand into semiconductor demand, and semiconductor demand ultimately becomes power-electronics, embedded-controller, and fab-capacity demand. The briefings were held on Oct. 22 at the Computer History Museum in Mountain View, California, where Infineon framed robotics, vehicles, and data centers as three loads pulling on the same silicon, packaging, and electrical-infrastructure stack, with 800 VDC as one visible target.

The historical context was supplied by Michio Kaku. As a theoretical physicist at City College of New York, he described innovation waves in terms close to Joseph Schumpeter’s creative-destruction argument: newer systems can render older technical bases obsolete. Kaku placed steam, transistors, the Information Age, and today’s AI revolution in one sequence; his forward-looking examples were quantum computing and brain-computer interfaces. For semiconductor readers, the point is narrower: if AI follows earlier waves, the constraint shifts from algorithms to manufacturable devices and supporting electrical systems.

Figure 1: Michio Kaku presenting on the different waves of technological innovation (Source: Aalyia Shaukat, OktoberTech 2026, Computer History Museum)

Semiconductor bottlenecks, not software slogans

The forum’s substantive material sat in automotive semiconductors, power electronics, and embedded processing. The recurring speaker position was that AI infrastructure raises requirements for semiconductor technologies and manufacturing capacity. That framing matters because selection, qualification, and sourcing decisions must be made years before a rack or vehicle platform reaches volume.

Edge AI versus the first IoT hype

Journalists pressed the question: why should edge AI escape the fate of IoT? Their evidence was that the billions of connected devices expected over cellular, Wi-Fi, and low-power networks did not show up, and Silicon Valley IoT meetings that once drew 12,000 to 14,000 people have vanished. Stefan Zizala, Infineon’s division president for edge systems, answered with a distinction rather than a defense. IoT, he said, is “an unfulfilled promise,” not a failed category. What has changed is microcontroller capability: larger memory and more compute allow inference to run on the device.

Then he gave the architectural rule: “Not every piece of information needs to be fed back to the cloud,” Zizala said. He expanded: “I think that’s the big difference…they are processed with AI right at the edge…and the results are then sent back to the cloud…So, it’s a conceptual change.” Examples included power tools and home appliances. He also pointed to machine-learning algorithms already used in electric motor control for predictive maintenance, and to cloud token cost, missing connectivity, latency, and data protection as practical reasons for local processing.

Vehicle software: legacy architecture as the blocker

Peter Schiefer, president and CEO of Infineon’s Automotive Division, used vehicle installed base to quantify the problem: only about 10% of vehicles have a software-defined architecture now, and roughly 90% do not. He predicted the SDV share will move to around 40%. Some audience members argued Chinese entrants benefit from no legacy stack, allowing them to start from a clean sheet of paper; Schiefer agreed that greenfield companies face fewer constraints.

A second obstacle was program coupling. Western OEMs tied SDV launches to new EV platforms, so platform cancellations delayed software-defined rollouts. China, having reached about 50% EV penetration, provides a different environment. Schiefer’s remedy for legacy manufacturers is control and consolidation: absorb complexity by replacing roughly 100 distributed control boxes, each with dedicated software, with a central computer. “That’s the only way traditional OEMs can survive. And I think meanwhile they recognize it, and they need to catch up,” he said.

Data-center power: announcements, 800 VDC, and Dresden capacity

Although physical AI provided the broader theme, the power-systems discussion was mostly about data centers. In October, Infineon pointed to a cluster of related developments: a 27 kW three-phase PSU reference design; an 800 VDC and ±400 V digital hot-swap controller; the first 900-V GaN bidirectional switch to be used in Enphase’s IQ solid-state transformer; and collaboration with Nvidia on 800 V to 50 V, 12 V, 6 V GaN intermediate bus converters.

The manufacturing answer came from Dresden. In July, Infineon opened the €5 billion (~$5.58 billion) Smart Power Fab, a 300-mm plant for power and analog/mixed-signal devices and the largest single investment in the company’s history. Adam White, president of the Power and Sensor Systems division, described it as capacity intended for AI infrastructure: “This facility is at the moment empty, okay? But I promise you now, with the demand that we’re seeing, that facility will be ramped.” He added that the fab is “open there for the industry.” Full production is set to ramp up in late 2026.

Figure 2: Adam White, president of Infineon’s Power and Sensor Systems division, presents the company’s grid-to-core view of AI data center power. (Source: Aalyia Shaukat, OktoberTech 2026, Computer History Museum)

On timing, White said 800 V DC products are not an overnight switch: “We may start seeing some of the first, whether they’re prototypes or mass productions, definitely in ‘28.” He described a path from single-phase systems to three-phase and then to medium-voltage DC at the facility level, calling the destination “the holy grail to get to the 1 MW rack.” Today’s sidecar method creates 800 V locally from three-phase AC, but White cautioned that UL certification and safety from the get-go remain significant barriers to entry.

IBC physics: GaN, current, and the last inch to the xPU

The intermediate-bus-converter segment gives a concrete view of the transition. In March 2026, Infineon released 800-to-50 V and 800-to-12 V IBCs; both use 650-V CoolGaN on the primary side (Table 1).

ProductConfigurationRated powerEfficiencyFootprintPower DensityDevices
HV IBC: 800 V to 50 VISOP, planar PCB-integrated transformer6 kW TDP (up to 10.8 kW for 400 µs)>98% full load60 × 60 × 11 mm2.5 kW/in³650 V CoolGaN primary+ multiple synchronous rectifier stages
HV IBC: 800 V to 12 VISOP LLC, matrix transformer6 kW TDP (up to 10.8 kW for 400 µs)98.2% peak, 97.1% full load130 × 40 × 8 mm>2.3 kW/in³650 V CoolGaN + 40 V OptiMOS 7

Table 1: Specifications of Infineon’s 800 V-to-50 V and 800 V-to-12 V CoolGaN IBC reference designs

The October releases reinforce GaN’s place in IBCs, a path also pursued by Renesas, TI, ST, and Navitas. The briefing also confirmed active development of 800-to-6 V conversion. Such a converter would take 800 VDC from the sidecar and step it down closer to the processor, potentially leaving room for final converters to bring 6 V to sub-1V core voltages—an area that remains open to debate.

The underlying physics is simple: I²R losses become dominant as voltage falls and current rises. The 20 kW-class 800-to-6 V converters shown at GTC 2026 push more than 3,000 A at their output (20 kW / 6 V ≈ 3,300 A). Once the converter approaches core voltage, the electrical path to the xPU must shorten; that is what drives the need for VPD on AI processors, especially GPUs.

Workload mix also changes the answer. During a panel on power delivery to xPUs—GPUs, CPUs, and TPUs—a panelist noted lateral power delivery will remain relevant for CPU-heavy agentic racks. Training still uses a GPU-dominant 8:1 GPU-CPU ratio, but inference runs around ~4:1 and agentic workloads move toward ~1:1 [2]. White reported: “From the customer interactions that we’re having, there are clear commitments I see from some of the bigger companies to go down to a ratio of 1:1,” he said. “Of course, that’s a dramatic change from 8:1 ratios that were there previously.”

FAQ: how these announcements affect semiconductor work

  • Does IoT’s weak outcome undercut edge AI? Not directly. Stefan Zizala described IoT as “an unfulfilled promise” and pointed to more capable microcontrollers and local memory as the differentiator. The change is not only connectivity, but where inference runs.
  • Why do SDV percentages matter? The installed base still lacks software-defined architecture: about 10% present, roughly 90% absent, with a forecast of around 40%. That gap is where consolidation of roughly 100 distributed control boxes into central computing becomes an engineering priority.
  • Will 800 VDC appear everywhere in 2026? No. The product releases and Dresden capacity are in the 2026 timeline, but White placed first prototypes or mass production “definitely in ‘28,” with UL certification and safety as gates.

Checklist for engineering and procurement teams

  • Map which functions can run on device using more capable microcontrollers and local AI models, then reserve cloud links for results rather than raw telemetry.
  • For vehicle programs, audit how many distributed control boxes can be consolidated into central software without disrupting safety-certified development.
  • Track GaN device adoption in IBC and SST paths, including 650-V CoolGaN, 40 V OptiMOS 7, and bidirectional switches such as the first 900-V GaN BDS.
  • Follow Dresden fab ramp timing and Smart Power Fab capacity, because power and analog/mixed-signal supply conditions influence data-center and industrial projects.
  • Use Table 1 parameters as the comparison baseline when selecting intermediate bus converter topologies, footprints, and efficiency targets.

Common misconceptions

  • Thinking all AI must be cloud-centered. The event’s edge-AI case argued that local processing can reduce cloud dependence, because not every piece of information needs to be fed back to the cloud.
  • Equating 800 VDC with a completed market transition. It is described as an end state, while sidecars and AC-to-800 V remain intermediate practice.
  • Assuming CPU and GPU power-delivery choices are identical. The ratios change: 8:1 for training, ~4:1 for inference, and ~1:1 for agentic workloads, which affects LPD/VPD considerations.

Action recommendations

For the near term, the practical actions are verification and architecture control rather than speculative redesign. Teams should validate local-model feasibility against latency, token cost, connectivity, and data-protection requirements. In vehicles, they should prioritize central-computing architecture and software ownership where legacy control boxes can be consolidated. In power systems, they should compare reference designs using measured metrics such as 6 kW TDP (up to 10.8 kW for 400 µs), efficiency, footprint, and power density, while monitoring the prototype-to-production window around ‘28. Because capacity and certification affect timing, keep Smart Power Fab ramp, UL certification, and safety requirements on the risk register.

References

  1. Omdia, Power Semiconductor Market Share Database, 1H26 (2025 Base Year), May 2026. Cited in Infineon Technologies AG, Q3 FY2026 Company Presentation, August 2026. https://www.infineon.com/assets/row/public/documents/corporate/company/fy2026-q3-web-en.pdf
  2. S. Bowerman and G. Ableidinger, “The CPU is back: Rethinking the CPU-GPU split for LLM inference,” Red Hat Blog, August 6, 2026. https://www.redhat.com/en/blog/cpu-back-rethinking-cpu-gpu-split-llm-inference
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