The reported change is not a simple downgrade story. During the third quarter of 2026, NVIDIA is said to have opened talks with Samsung and SK Hynix about giving future products more of a role for 8-layer HBM4, a configuration that may be easier to manufacture and cool than taller stacks. The discussion matters to Electronicseng readers because it changes how AI accelerator designers should weigh memory capacity, thermal limits, certification status, and supply risk when they evaluate Rubin-series systems.
Market expectations had centered on Rubin products using more advanced 12-layer HBM4 or HBM4E memory. Supply-chain reality pushed a different evaluation. When a DRAM stack grows by one layer, thermal resistance increases, heat removal becomes harder, wafer-bonding defect probability rises, and overall yield is reduced. In that context, 8-layer HBM4 is less about rejecting high capacity and more about choosing a stack height that production lines can deliver with fewer process complications.
12-layer HBM4 has not been withdrawn. Samsung and SK Hynix are reported to remain in mass production of 12-layer HBM4 products, and those products have obtained NVIDIA certification. The outlook described is that, in the coming years, 12-layer HBM4 will continue to occupy an important part of the high-end HBM market. The change is in mix rather than disappearance: from mid-2027, 8-layer versions are expected to take a significantly larger share.
Information attributed to South Korean media says Samsung and SK Hynix still need independent certification for 8-layer HBM4. The companies are preparing related components, materials, and quality verification workflows. Because the 8-layer solution has lower technical complexity than the 12-layer solution, industry observers see the later certification as relatively less difficult and unlikely to create major delays.
NVIDIA is not evaluating 8-layer HBM4 only. An 8-layer HBM4E option is also under consideration. The final choice for Rubin Ultra and its NVL rack-level system depends on design requirements, supply capability, and the overall cost structure.
Rubin Ultra itself is reported to have changed direction. Earlier expectations pointed toward a more aggressive large-scale chiplet architecture, but supply-chain pressure led NVIDIA to reduce some of the planned complexity. The product is now described as using a dual-chip design, a change intended to lower manufacturing risk while keeping production timing on track.
Rubin and Rubin Ultra are positioned as the next-generation AI computing platforms scheduled for 2027, intended to succeed Blackwell series as NVIDIA flagship products. The partial move from 12-layer HBM4 toward 8-layer HBM4 therefore signals a broader industry transition: parameter maximization and stack-height competition are being balanced against yield, thermal control, and stable supply.
| Dimension | 8-Layer HBM4 | 12-Layer HBM4 |
|---|---|---|
| Layer count | 8 layers | 12 layers |
| Thermal effect | Easier cooling is the reported advantage | Each added one layer raises thermal resistance |
| Manufacturing effect | Lower complexity than the 12-layer solution | Higher defect probability and yield pressure are reported |
| Capacity position | Single-stack capacity is treated as a compromise | Associated with the higher-stack direction that 8 layers compromise |
| Certification and supply status | Under evaluation; independent certification is still pending | In mass production and NVIDIA certified |
| Market outlook | Share may rise significantly from mid-2027 | Expected to remain important in the high-end HBM market in the coming years |
Because each additional layer increases thermal resistance, cooling difficulty, wafer-bonding defect probability, and yield loss. The 8-layer stack is reported as an easier-to-manufacture and easier-to-cool compromise.
No. Samsung and SK Hynix are described as mass-producing 12-layer HBM4 products, and those products have NVIDIA certification. 12-layer HBM4 is expected to remain important in the high-end market in the coming years.
Independent certification for Samsung and SK Hynix. The companies are preparing components, materials, and quality verification processes.
No. 8-layer HBM4E is also being evaluated. Final Rubin Ultra and NVL rack-level system choices depend on design requirements, supply capability, and overall cost structure.
The most useful takeaway is that HBM selection is becoming a systems-level decision. A taller stack may satisfy capacity objectives, but the reported Rubin discussion shows that a lower stack can be favored when it improves cooling, bonding yield, certification pace, and supply predictability. For Electronicseng’s semiconductor audience, the practical conclusion is to follow the 8-layer versus 12-layer mix not as a contest of specifications, but as a signal of where AI accelerator manufacturing constraints are moving next.